Gallium nitride (GaN) and other “Group III-nitrides” can be used in manufacturing high-speed or high-power integrated circuit devices. Gallium nitride is often desirable because it can withstand high operating temperatures and can provide high breakdown voltages compared to standard silicon devices. Gallium nitride can also typically provide good high-frequency performance and provide lower on resistances.
Native gallium nitride substrates are not generally available. Instead, gallium nitride epitaxial layers are often formed over silicon-based substrates, such as <111> silicon wafers. However, it is often difficult to form thick high-quality gallium nitride epitaxial layers over large silicon substrates. This is due to a number of factors, including large thermal expansion coefficient mismatches and wafer bowing. More specifically, a gallium nitride epitaxial layer can contract about twice as fast when cooled compared to an underlying silicon substrate. This causes tensile stress in the gallium nitride epitaxial layer, which can lead to wafer bowing and produce cracks in the epitaxial layer. These problems are worse with larger substrates, such as silicon wafers with six-inch or larger diameters.
The inability to form thick high-quality gallium nitride layers can reduce the breakdown voltage of field effect transistors (FETs), high electron mobility transistors (HEMTs), or other devices formed using the gallium nitride layers. Also, the production of circuits on larger substrates is typically desired since the same processing steps can be used to fabricate a larger number of circuits on the substrates, resulting in a production cost reduction per circuit. The inability to form thick high-quality gallium nitride layers over larger substrates can limit or eliminate these cost reductions, resulting in higher-cost circuits. In addition, wafer bowing and epitaxial layer cracking can actually limit the manufacturability of certain gallium nitride-based circuits.